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HN27C4096ACP Series
262144-word x 16-bit CMOS One Time Programmable ROM
ADE-203-240B (Z) Rev. 2.0 Jun. 22, 1995 Description
The Hitachi HN27C4096ACP is a 4-Mbit one time programmable ROM, featuring high speed and low power dissipation. Fabricated on advanced fine process and high speed circuitry technique, the HN27C4096ACP makes high speed access time possible. Therefore, it is suitable for 16-bit microcomputer systems using high speed microcomputer such as the 80286 and 68020. The HN27C4096ACP offers high speed programming using page programming mode. This device is packaged in a 44-pin plastic leaded chip carrier (PLCC). Therefore, this device cannot be rewritten.
Features
* High speed Access time: 120 ns/150 ns (max) * Low power dissipation Standby mode: 5 W (typ) Active mode: 35 mW/MHz (typ) * Fast high reliability page programming, fast high-reliability programming and option programming Programming voltage: +12.5 V D.C. Program time: 3.5 sec (min) (Theoretical in Page programming) * Inputs and outputs TTL compatible during both read and program modes * Pin arrangement: 44-pin PLCC JEDEC standard * Device identifier mode: Manufacturer code and device code * Fully compatible with the HN27C4096CP Series
Ordering Information
Type No. HN27C4096ACP-12 HN27C4096ACP-15 Access Time 120 ns 150 ns Package 44-pin PLCC (CP-44)
HN27C4096ACP Series
Pin Arrangement
HN27C4096ACP Series
I/O13 I/O14 I/O15 A17 A16 A15 A14 39 38 37 36 35 34 33 32 31 30 29 18 19 20 21 22 23 24 25 26 27 28 I/O3 I/O2 I/O1 I/O0 OE NC A0 A1 A2 A3 A4 V PP 2 VCC NC CE 3
6 I/O12 I/O11 I/O10 I/O9 I/O8 VSS NC I/O7 I/O6 I/O5 I/O4 7 8 9 10 11 12 13 14 15 16 17
5
4
1 44 43 42 41 40 A13 A12 A11 A10 A9 V SS NC A8 A7 A6 A5
(Top View)
Pin Description
Pin Name A0 - A17 I/O0 - I/O15 CE OE VCC VPP VSS Function Address Input/output Chip enable Output enable Power supply Programming power supply Ground
2
HN27C4096ACP Series
Block Diagram
A7 ............ 2048 x 2048 X-Decoder Memory Matrix
A17
I/O0 .... I/O15
Input Data Control
Y-Gating Y-Decoder
CE OE VCC VPP H VSS H : High Threshold Inverter H A0 ............ A6
3
HN27C4096ACP Series
Mode Selection
Mode Read Output disable Standby Page program Page program set Page data latch Page program Page program verify Page program reset Word program Program Program verify Optional verify Program inhibit Identifier Notes: 1. X: Don't care. 2. VH : 12.0 V 0.5 V Pin CE (3) OE (22) A9 (35) VPP (2) VIL VIL VIH VIH VIL VIL VIH VIH VIL VIH VIL VIH VIL VIL VIH X VH VH
*2 *2
VCC (44) I/O (4 - 11, 14 - 21) VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC Dout High-Z High-Z High-Z Din High-Z Dout High-Z Din Dout Dout High-Z Code
X X X X X X X X X X X X VH
*2
VSS - VCC VSS - VCC VSS - VCC VPP VPP VPP VPP VCC VPP VPP VPP VPP VSS - VCC
VIH VIL VIH VIH VIL VIL VIH VIL
Absolute Maximum Ratings
Parameter All input and output voltages Voltage on pin A9 and OE VPP voltage VCC voltage Operating temperature range Storage temperature range Storage temperature under bias Symbol Vin, Vout VID VPP VCC Topr Tstg Tbias Value -0.6 to +7.0 -0.6 to +13.0 -0.6 to +13.5 -0.6 to +7.0 0 to +70 -55 to +125 -20 to +80
*2 *2
Unit V V V V C C C
Notes 1, 2 2 1 1
3
Notes: 1. Relative to VSS . 2. Vin, Vout, V ID min = -2.0 V for pulse width 20 ns. 3. Storage temperature range of device before programming.
4
HN27C4096ACP Series
Capacitance (Ta = 25C, f = 1 MHz)
Parameter Input capacitance Output capacitance Symbol Cin Cout Min -- -- Typ -- -- Max 12 20 Unit pF pF Test Conditions Vin = 0 V Vout = 0 V
Read Operation
DC Characteristics (VCC = 5 V 10%, VPP = VSS to VCC, Ta = 0 to +70C)
Parameter Input leakage current Output leakage current VPP current Standby V CC current Symbol I LI I LO I PP1 I SB1 I SB2 Operating VCC current I CC1 I CC2 Input voltage VIL VIH Output voltage VOL VOH Min -- -- -- -- -- -- -- -0.3 2.2 -- 2.4
*1
Typ -- -- 1 -- 1 -- -- -- -- -- --
Max 2 2 20 1 20 30 90 0.8 VCC + 1 0.45 --
*2
Unit A A A mA A mA mA V V V V
Test Conditions Vin = 5.5 V Vout = 5.5 V/0.45 V VPP = 5.5 V CE = VIH CE = VCC 0.3 V Iout = 0 mA, f = 1 MHz Iout = 0 mA, f = 8.4 MHz
I OL = 2.1 mA I OH = -400 A
Notes: 1. VIL min = -1.0 V for pulse width 50 ns. VIL min = -2.0 V for pulse width 20 ns. 2. VIH max = Vcc +1.5 V for pulse width 20 ns. If V IH is over the specified maximum value, read operation cannot be guaranteed.
5
HN27C4096ACP Series
AC Characteristics (VCC = 5 V 10%, VPP = VSS to VCC, Ta = 0 to +70C)
Test Conditions * * * * Input pulse levels: 0.45 to 2.4 V Input rise and fall time: 10 ns Output load: 1 TTL Gate + 100 pF Reference levels for measuring timing: 0.8 V, 2.0 V
HN27C4096ACP -12 Parameter Address to output delay CE to output delay OE to output delay OE high to output float Note:
*1
-15 Max 120 120 60 40 -- Min -- -- -- 0 5 Max 150 150 70 50 -- Unit ns ns ns ns ns Test Conditions CE = OE = VIL OE = VIL CE = VIL CE = VIL CE = OE = VIL
Symbol Min t ACC t CE t OE t DF t OH -- -- -- 0 5
Address to output hold
1. t DF is defined as the time at which the output achieves the open circuit condition and data is no longer driven.
Read Timing Waveform
Address
CE
Standby mode tCE
Active mode
Standby mode
OE tOE t ACC Data Out Data Out Valid tOH
tDF
6
HN27C4096ACP Series
Fast High-Reliability Page Programming This device can be applied the high performance page programming algorithm shown in the following flowchart. This algorithm allows to obtain faster programming time without any voltage stress to the device nor deterioration in reliability of programmed data. Page Program Set Apply 12 V to OE pin after applying 12.5 V to VPP to set a page program mode. The device operates in a page program mode until reset. Page Program Reset Set VPP to VCC level or less to reset a page program mode.
7
HN27C4096ACP Series
START SET PAGE PROG LATCH MODE VPP = 12.5 0.3 V, VCC = 6.25 0.25 V OE = 12.0 0.5 V Address = 0 n=0 Latch Address + 1 Address Latch Address + 1 Address Latch Address + 1 Address Latch n + 1 n SET PAGE PROG./VERIFY MODE VPP = 12.5 0.3 V, VCC = 6.25 0.25 V Address + 1 Address Program tPW = 50 s 5% VERIFY NO GO LAST address? NOGO
n = 10? YES
NO
YES SET READ MODE VCC = 5.0 0.5 V, VPP = VCC READ all address GO END Fast High-Reliability Page Programming Flowchart NOGO
FAIL
8
HN27C4096ACP Series
DC Characteristics (VCC = 6.25 V 0.25 V, VPP = 12.5 V 0.3 V, Ta = 25C 5C)
Parameter Input leakage current Output voltage during verify Symbol I LI VOL VOH Operating VCC current Input voltage I CC VIL VIH VH VPP supply current I PP Min -- -- 2.4 -- -0.1 2.2 11.5 --
*5
Typ -- -- -- -- -- -- 12.0 --
Max 2 0.45 -- 50 0.8 VCC + 0.5 12.5 70
*6
Unit A V V mA V V V mA
Test Conditions Vin = 6.5 V/0.45 V I OL = 2.1 mA I OH = -400 A
CE = VIL
Notes: 1. VCC must be applied simultaneously or before VPP and removed simultaneously or after V PP . 2. VPP must not exceed 13 V including overshoot. 3. An influence may be had upon device reliability if the device is installed or removed while VPP = 12.5 V. 4. Do not alter VPP either V IL to 12.5 V or 12.5 V to VIL when CE = low. 5. VIL min = -0.6 V for pulse width 20 ns. 6. If V IH is over the specified maximum value, programming operation cannot be guaranteed.
9
HN27C4096ACP Series
AC Characteristics (VCC = 6.25 V 0.25 V, VPP = 12.5 V 0.3 V, Ta = 25C 5C)
Test Conditions * Input pulse levels: 0.45 to 2.4 V * Input rise and fall time: 20 ns * Reference levels for measuring timing: Inputs: 0.8 V, 2.0 V, Outputs: 0.8 V, 2.0 V
Parameter Address setup time OE setup time Data setup time Address hold time Data hold time OE high to output float delay VPP setup time VCC setup time CE programming pulse width CE setup time Data valid from OE CE pulse width during data latch OE = VH setup time OE = VH hold time VPP hold time
*2
Symbol t AS t OES t DS t AH t DH t DF
*1
Min 2 2 2 0 2 0 2 2 47.5 2 0 1 2 2 1
Typ -- -- -- -- -- -- -- -- 50.0 -- -- -- -- -- --
Max -- -- -- -- -- 130 -- -- 52.5 -- 150 -- -- -- --
Unit s s s s s ns s s s s ns s s s s
Test Conditions
t VPS t VCS t PW t CES t OE t LW t OHS t OHH t VRS
Notes: 1. t DF is defined as the time at which the output achieves the open circuit condition and data is no longer driven. 2. Page program mode will be reset when VPP is set to VCC or less.
10
HN27C4096ACP Series
Fast High-Reliability Page Programming Timing Waveform
Page program mode Program data latch A2 - A17 t AS A0, A1 t DH t DS Data Data in stable Data out valid t VPS VPP
VPP VCC
Page program
Program verify
t AH
t AS
t AH
t OE t DF
t VCS
VCC + 1.25
VCC
VCC
t OHH t OHS t CES t PW t OES
CE t LW OE
VH VIH VIL
t VRS
11
HN27C4096ACP Series
Fast High-Reliability Progamming
This device can be applied the fast high-reliability programming algorithm shown in the following flowchart. This algorithm allows to obtain faster programming time without any voltage stress to the device nor deterioration in reliability of programmed data.
START SET PROG./VERIFY MODE VPP = 12.5 0.3 V, VCC = 6.25 0.25 V Address = 0 n=0 n+1 n
Program tPW = 50 s 5% Address + 1 Address NO VERIFY GO LAST address? NOGO n = 10? YES NO
YES SET READ MODE VCC = 5.0 0.5 V, VPP = VCC READ all address GO END Fast High-Reliability Programming Flowchart NOGO
FAIL
12
HN27C4096ACP Series
DC Characteristics (VCC = 6.25 V 0.25 V, VPP = 12.5 V 0.3 V, Ta = 25C 5C)
Parameter Input leakage current VPP supply current Operating VCC current Input voltage Symbol I LI I PP I CC VIL VIH Output voltage VOL VOH Min -- -- -- -0.1 2.2 -- 2.4
*5
Typ -- -- -- -- -- -- --
Max 2 40 50 0.8 VCC + 0.5 0.45 --
*6
Unit A mA mA V V V V
Test Conditions Vin = 6.5 V/0.45 V CE = VIL
I OL = 2.1 mA I OH = -400 A
Notes: 1. VCC must be applied simultaneously or before VPP and removed simultaneously or after V PP . 2. VPP must not exceed 13 V including overshoot. 3. An influence may be had upon device reliability if the device is installed or removed while VPP = 12.5 V. 4. Do not alter VPP either V IL to 12.5 V or 12.5 V to VIL when CE = low. 5. VIL min = -0.6 V for pulse width 20 ns. 6. If V IH is over the specified maximum value, programming operation cannot be guaranteed.
AC Characteristics (VCC = 6.25 V 0.25 V, VPP = 12.5 V 0.3 V, Ta = 25C 5C)
Test Conditions * Input pulse levels: 0.45 to 2.4 V * Input rise and fall time: 20 ns * Reference levels for measuring timing: Inputs: 0.8 V, 2.0 V, Outputs: 0.8 V, 2.0 V
Parameter Address setup time OE setup time Data setup time Address hold time Data hold time OE to output float delay VPP setup time VCC setup time CE programming pulse width Data valid from OE Note: Symbol t AS t OES t DS t AH t DH t DF
*1
Min 2 2 2 0 2 0 2 2 47.5 0
Typ -- -- -- -- -- -- -- -- 50.0 --
Max -- -- -- -- -- 130 -- -- 52.5 150
Unit s s s s s ns s s s ns
Test Conditions
t VPS t VCS t PW t OE
1. t DF is defined as the time at which the output achieves the open circuit condition and data is no longer driven.
13
HN27C4096ACP Series
Fast High-Reliability Programming Timing Waveform
Program Address t AS Data t DS V PP V PP V CC t VPS V CC V CC+1.25 V CC t VCS CE Data In Stable t DH t AH Data Out Valid t DF Program Verify
t PW OE
t OES
t OE
Optional Page Programming
This device can be applied the optional page programming algorithm shown in the following flowchart. This algorithm allows to obtain faster programming time without any voltage stress to the device nor deterioration in reliability of programmed data. This programming algorithm is the combination of page programming and word verify. It can avoid the increase of programming verify time when a programmer with slow machine cycle is used, and shorten the total programming time. Regarding the timing specifications for page programming and word verify, please refer to the specifications for fast high-relaibility page programming and fast high-reliability programming.
14
HN27C4096ACP Series
START SET PAGE PROG. LATCH MODE VPP = 12.5 0.3 V, VCC = 6.25 0.25 V OE = 12.0 0.5 V Address = 0 Latch Address + 1 Latch Address + 1 Latch Address + 1 Latch SET PAGE PROG./MODE VPP = 12.5 0.3 V, VCC = 6.25 0.25 V Address + 1 Address Program tPW = 50 s 5% NO LAST address? Address Address Address
YES PAGE PROG. RESET VPP = VCC = 6.25 0.25 V SET WORD PROG./VERIFY MODE VPP = 12.5 0.3 V, VCC = 6.25 0.25 V Address = 0 n=0 VERIFY NOGO n+1 Address + 1 Address n Program tPW = 50 s 5% VERIFY GO NO LAST address? n = 10? YES NO NOGO
GO
YES SET READ MODE VCC = 5.0 0.5 V, VPP = VCC READ all address GO END Optional Page Programming Flowchart NOGO
FAIL
15
HN27C4096ACP Series
DC Characteristics (VCC = 6.25 V 0.25 V, VPP = 12.5 V 0.3 V, Ta = 25C 5C)
Parameter Input leakage current Output voltage during verify Symbol I LI VOL VOH Operating VCC current Inputt voltage I CC VIL VIH VH VPP supply current I PP Min -- -- 2.4 -- -0.1 2.2 11.5 --
*5
Typ -- -- -- -- -- -- 12.0 --
Max 2 0.45 -- 50 0.8 VCC + 0.5 12.5 70
*6
Unit A V V mA V V V mA
Test Conditions Vin = 6.5 V/0.45 V I OL = 2.1 mA I OH = -400 A
CE = VIL
Notes: 1. VCC must be applied simultaneously or before VPP and removed simultaneously or after V PP . 2. VPP must not exceed 13 V including overshoot. 3. An influence may be had upon device reliability if the device is installed or removed while VPP = 12.5 V. 4. Do not alter VPP either V IL to 12.5 V or 12.5 V to VIL when CE = low. 5. VIL min = -0.6 V for pulse width 20 ns. 6. If V IH is over the specified maximum value, programming opration cannot be guaranteed.
16
HN27C4096ACP Series
AC Characteristics (VCC = 6.25 V 0.25 V, VPP = 12.5 V 0.3 V, Ta = 25C 5C)
Test Conditions * Input pulse levels: 0.45 to 2.4 V * Input rise and fall time: 20 ns * Reference levels for measuring timing: Inputs: 0.8 V, 2.0 V, Outputs: 0.8 V, 2.0 V
Parameter Address setup time OE setup time Data setup time Addres hold time Data hold time OE high to output float delay VPP setup time VCC setup time CE programming pulse width CE setup time Data valid from OE CE pulse width during data latch OE = VH setup time OE = VH hold time Page programming reset time VPP hold time
*2 *2
Symbol t AS t OES t DS t AH t DH t DF
*1
Min 2 2 2 0 2 0 2 2 47.5 2 0 1 2 2 1 1
Typ - - - - - - - - 50.0 - - - - - - -
Max - - - - - 130 - - 52.5 - 150 - - - - -
Unit s s s s s ns s s s s ns s s s s s
Test Conditions
t VPS t VCS t PW t CES t OE t LW t OHS t OHH t VLW t VRS
Notes: 1. t DF is defined as the time at which the output achieves the open circuit condition and data is no longer driven. 2. Page program mode will be reset when VPP is set to VCC or less.
17
HN27C4096ACP Series
Optional Page Programming Timing Waveform
Page program mode Program data latch Page program
Word program mode Program verify Program
A2 - A17 t AH t AS t AH t AS t AH
A0, A1 t DS
Data in stable
t DH
t DS
Data out valid
t DH
Data in stable
Data t VPS VPP VCC t VCS
t VPS t OE t DF
VPP
t VRS t VLW
VCC+ 1.25 VCC VCC t OHS t OHH t CES
t CES
CE t LW t PW OE VH VIH VIL
t OES t PW
Mode Description
Device Identifier Mode The device identifier mode allows the reading out of binary codes that identify manufacturer and type of device, from outputs of OTPROM. By this mode, the device will be automatically matched its own corresponding programming algorithm, using programming equipment.
18
HN27C4096ACP Series
HN27C4096ACP Identifier Code
A0 (24) VIL VIH I/O8 - I/O15 (11) - (4) X X I/O7 (14) 0 1 I/O6 (15) 0 0 I/O5 (16) 0 1 I/O4 (17) 0 0 I/O3 (18) 0 0 I/O2 (19) 1 0 I/O1 (20) 1 1 I/O0 (21) 1 0
Identifier Manufacturer code Device code Notes: 1. 2, 3. 4.
Hex Data 07 A2
VCC = 5.0 V 10%. A9 = 12.0 V 0.5 V. A1 - A8, A10 - A17, CE, OE = VIL. X: Don't care.
Recommended Screening Conditions
Before mounting, please make the screening (baking without bias) shown in the right.
Program and verify by programmer
Baking at 125 to 150C for 24 to 48 hrs
Ensuring read-out
Mounting Recommended Screening Conditions
19
HN27C4096ACP Series
Package Dimensions
HN27C4096ACP Series (CP-44)
17.53 0.12 16.58 39 40 17.53 0.12 44 1 29 28
Unit: mm
4.40 0.20
6 7
0.74
18 17
0.43 0.10
1.27
2.55 0.15
15.50 0.50
15.50 0.50
0.10
20

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